OPTIONAL MECHANICAL BRAKE RELEASE or CLUTCH ENGAGEMENT: The
other braking combinations using D0 allow for command of the optional mechanical brake output. It provides a 2 amp output current sink that turns on when there's a command for motion. With a stop command it goes off after a short delay. Connect at the single
terminal block connection BRK. Install a flyback diode across your coil to protect
the CDFR.
WIRING: Use proper static precautions while
wiring; particularly the parallel data interface. Follow the layout schematic. Do not
power the CDFR from batteries under charge, battery eliminators or chargers without consulting factory.
POWER & MOTOR: Observe battery polarity. The SPEC CHART shows the minimum size wire for the battery power and motor wiring; it is the size to use for each of the double wires. You must use double wiring to the Ma1, Mb1, Ma2, Mb2, +1 and +2 nodes on the handy plug in terminal block. We recommend you run the double wires all the way to their termination point; for example; the motor terminals. Screw torque will effect the connection resistance so tighten them!
We have provided 4 connection screws for the ground node. Use all four as a massive
parallel GROUND per the wire size indicated in the SPEC CHART. There are modes (perhaps going forward
in your project!) where all the current of your two starting motors goes
through the ground!
Wire with the minimum length wire practical and
keep this wiring separated from the computer and parallel data interface. Ground your
chassis at a single point but don't use the chassis to conduct current. Use separate
regular-blow fuses to feed the +1 and +2 power terminals; select the
smallest fuse which will support your normal operation but no larger than rated surge
current. Install a .001ufd ceramic disc capacitor directly across each motors brushes and
between each brush and their motor case for RFI protection.
PARALLEL DATA INTERFACE: Noise in the command data lines will result in improper operation. Use a #18 or equivalent in combined conductors for the ground; for example: some ribbon cable schemes use a ground for every other wire. Longer runs and FCC requirements may indicate shielded cable. Use the minimum length wire practical and don't bundle it with other data or power wiring. These CDFR models have a common ground between the logic and the power circuitry; use caution to avoid ground loops. Any circuit paths, including unintentional sneak path, that forces the ground between your computer and the CDFR to conduct current will modulate noise onto the data. We recommend initial testing and learning operation of the unit on a test bench with a completely separate motor battery running small unloaded test motors. Guard against static.
The parallel interface is a 24 pin DIP socket typically
used for 24 pin Skinny-DIP Integrated Circuits like the 87C751. It's pins are
numbered like an IC with pin 1 through pin 12 down one side and pin 13 through pin 24 up the other side such that pin 1 and pin 24 are right across the .300" width from each
other, at the notched end as indicated by the white printed nomenclature. The socket is labeled U6 at the notch end and pin 1 is adjacent to the U in U6.
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